1. Field of the Invention
The invention relates to a method of manufacturing a silicon-germanium heterojunction bipolar transistor (SiGe HBT), more particularly to a process for manufacturing the SiGe HBT by combining a SEG and Non-SEG method.
2. Description of the Prior Art
Silicon-Based technology in the electrical minimization has some problems due to the fact that the nanometer process is limited by device and manufacturing process limitations. In order to improve the process ability, many electrical device manufactures are looking for methods in solving those problems. One of them is Silicon-Germanium (SiGe) technology, which has a heterojunction between Si/SiGe/Si, its integrated well with the main process which is CMOS. The SiGe technology is a new generation of microelectronics. The application of SiGe devices can be classified into two categories: (1) Heterojunction Field Effect Transistor, HFET; (2) Heterojunction Bipolar Transistor, HBT; however, the focus of attention is on the SiGe HBT technology because it can highly improve the bipolar high frequency characteristic when using SiGe film as a base. Besides, by a development in mobile communication, RF (radio frequency) components are required to be much smaller, lighter, and at the same time multi-functional with a lower power consumption. Furthermore, the SiGe HBT is predominant because it has an advantage using a high frequency, which is easy to integrate with a complementary metal-oxide semiconductor (CMOS) into highly scaled CMOS technologies such as BiCMOS. By a development of hybrid IC technology and monolithic microwave integrated circuit (MMIC) technology, the SiGe HBT may be formed into the IC and the quality of the terminal and system is improved.
Germanium is added to silicon to form the high-performance heterojunction bipolar transistors, in the base of a silicon-germanium alloy, germanium is narrower in bandgap than silicon and faster in electron/hole mobility (about 3˜4 times). The silicon-germanium alloy is similar in both their lattices, therefore appropriately growing the quantity of germanium and its structure with the Si/SiGe crystalline layer, therefore improving the performance of the device by employing almost all the existing silicon process'. This kind of technology named Si/SiGe technology that combines both advantages of these two elements, for instance SiGe HBT, SiGe MOSFET etc. The SiGe HBT in which silicon-germanium is used as a base layer and has three different kinds of growth, which are Blanket, Differential and Selective, however, the thickness of the base layer is thinner than the conventional junction transistor. Since germanium can make the energy bandgap become smaller in the base layer, there are some advantages to obtain a high current gain and operating speed with lower power consumption. On the other hand, the lattice of the germanium atom is slightly bigger than the silicon atom and the silicon-germanium film belongs to a Strained Layer so that the quality depends on the conditions of growth, conditions of temperature and the amount of germanium as a dopant.
FIG. 1 is a schematically cross-sectional view of a SiGe HBT by selective epitaxial growth (SEG) method. The SiGe HBT by SEG method comprises a silicon substrate 101, an oxide layer 102, a SiGe intrinsic base 103 by SEG method, a polysilicon extrinsic base 104, a spcer 105, a dielectric layer 106 and a emitter poly 107. The SiGe base layer is grown by the SEG method and then the inner spacer defines the emitter window. Because of a self-aligned process, it can reduce the production of one mask, like that which has just been described, requires the use of at least three masks in this bipolar transistor. In addition, this bipolar transistor does not need an extra implantation and thermal flow during the process to reduce the resistance of the base layer. FIG. 2 is a schematically cross-sectional view of a SiGe HBT by Non-SEG method. The SiGe HBT by Non-SEG method comprises a silicon substrate 201, a SiGe base layer 202 (epi-layer of the SiGe base 203 and polysilicon layer of the SiGe base 204), an oxide layer 205, a buffer polysilicon layer 206, a dielectric layer 207 and an emitter layer 208. The characteristic is that defines the base window and then the thin buffer polysilicon layer is grown upward on the silicon dioxide layer and silicon layer. Afterwards, the SiGe layer is deposited. As a result, the SiGe layer is deposited simultaneously inside the amorphous region and crystalline region (the epi-silicon is grown within the crystalline region, the polysilicon is grown within the amorphous region), the SiGe film is easy to control so as to be a uniform film. Further, its not easy to produce the leakage current between base and emitter.
The bipolar transistor by the selective epitaxial growth method is difficult to control the growing region and the uniformity due to the fact that the inner spacer defines the emitter window. More, it is easy to form a crystal face upward on the emitter window, in which the crystal face is different from the epi-silicon base, therefore, it will produce leakage current between base and emitter. Also, when shrinking the device to have a smaller emitter window, the growth of the SiGe layer will be limited.
On the other hand, the bipolar transistor by a Non-SEG method needs an extra mask to define the emitter window due to lack of the inner spacer, like the one that has just been described, the process requires the use of at least four masks. Hence, the shrinkage of the emitter window will be limited by the ability of process, which is not easy to achieve by dry etching. In addition, the process of this transistor needs an extra implantation and thermal flow to reduce the resistance of the SiGe layer, but the extra implantation and thermal flow will lead transient-enhanced diffusion (TED) effect release and diffuse to a junction that is between the base and the emitter.
Accordingly, both processes have their own advantages and drawbacks respectively, hence, whichever process is chosen, both will have their limitations.